The present invention is related to the field of DC power supply circuits, and more particularly to circuits such as switching power supplies that employ power switching transistors.
In switching power supplies and other circuits employing power switching transistors, it is common for the operation of the circuit to depend in some manner on the amount of current flowing through a switching transistor. For example, most switching power supplies have protection circuitry that shuts the switching transistor off if it is conducting an excessive amount of current, to prevent the transistor from being damaged. This situation might arise, for example, if the output of the power supply is inadvertently short-circuited. The current being conducted by the transistor is sensed in some fashion, and a current sense signal indicating the magnitude of the current in the transistor is provided to the protection circuitry. Typically the protection circuitry compares the current sense signal with a reference signal indicating the maximum permissible current, and shuts off the transistor if the comparison indicates that the maximum permissible current is being exceeded.
One common problem in circuits that rely on a current sense signal from a switching transistor is the possibility of "false alarms", or conditions in which the current sense signal indicates that excessive current is being conducted but it is undesirable for the circuitry using the current sense signal to respond. A well-known example of such a condition occurs during a short interval after a switching transistor switches on, referred to as the "leading edge" of the current sense signal. For any of a variety of well-known reasons, the current through the transistor rises, or "spikes", to a very large value before returning to a more slowly-varying level as determined by the surrounding circuit. It is undesirable for protection circuitry to shut off the transistor under such transient conditions.
This problem of a leading-edge spike on the current sense signal has been addressed in prior switching power supplies by a variety of special spike-suppression circuits. One general class of spike-suppression circuits are referred to as "leading edge blanking" circuits. These circuits are activated just prior to the time that the switching transistor is turned on, and operate to override or "blank" the current sense signal during a brief blanking interval after the switching transistor is turned on. For example, the circuit node on which the current sense signal appears may be temporarily shorted to ground through a pulldown transistor. The protection or other circuitry using the current sense signal does not receive the transient spike, and therefore as is desired the circuitry does not respond during the blanking interval.
One approach to leading edge blanking has been to employ a one-shot timer. The timer is triggered at the same time that the switching transistor is turning on, and it provides a pulse of predetermined duration that is used to blank the current sense signal. This approach suffers some drawbacks that make it unattractive in many cases. The fixed blanking period set by the timer limits the frequency range over which the switching circuitry may be used. This fixed limit is problematic if the control circuitry for the switching transistor is intended to be used in a variety of different power supply circuits. Also, the limited accuracy of the timing circuit when combined with worst-case design constraints requires that the nominal blanking interval be larger than that required to effectively override the leading-edge spike, in order to accommodate production tolerances of component values. This requirement likewise may unnecessarily limit the range of applications of the circuit.
Another known approach to leading edge blanking is described, for example, in U.S. Pat. No. 5,418,410 to Eric Tisinger, entitled "Leading Edge Blanking Circuit". The blanking circuit in the Tisinger patent monitors the gate voltage of a MOS switching transistor connected between an output node and ground. A predetermined threshold level is established that is between a "plateau" gate voltage, reached early during the transistor's switching, and a final gate voltage reached when the transistor has completely switched. When the gate voltage exceeds the threshold level, the current spike has substantially subsided. The circuit operates by blanking the leading edge of the current sense signal until the gate voltage exceeds the threshold level. Because the circuit's operation is responsive to the operation of the actual switching device in the power supply rather than operating in a predetermined fixed manner, the blanking circuit is an example of "adaptive" leading edge blanking.
Adaptive leading edge blanking is in general a superior solution to the current spike problem, because it enables a blanking circuit to be used effectively despite variations in the characteristics of the switching transistor or other circuit components. However, the technique of monitoring gate voltage illustrated in the Tisinger patent does not provide adequate blanking when the actual gate voltage of the switching transistor cannot be monitored. This situation exists, for example, when the switching transistor is housed in a separate integrated circuit package from the blanking circuitry. In such a case there is series gate resistance existing in the gate drive path, between the circuit node at which the gate voltage is sensed and the actual gate of the switching transistor. In some cases a series resistor may be purposely placed in this path to accomplish other design goals; in other cases the series resistance may be an uncontrollable parasitic resistance arising from the packaging or circuit layout of the switching transistor. When series resistance is present, the real gate voltage of the switching transistor always lags behind the voltage used by the blanking circuitry. Thus blanking circuitry like that shown in the Tisinger patent is prone to terminate blanking prematurely, in which case erroneous operation of the circuitry using the current sense signal may result.
It is desirable to employ adaptive leading edge blanking of a current sense signal such that accurate blanking is achieved despite the existence of series gate resistance or other parasitics in the gate drive path of a switching transistor.